NAND gate is the opposite of the digital AND gate, and behaves in a manner that corresponds to the opposite of AND gate, as shown in the truth table on the right Fig-1. A LOW output results only if both the inputs to the gate are HIGH. If one or both inputs are LOW, a HIGH output results. The NAND gate is a universal gate in the sense that any boolean function can be implemented by NAND gates.
"If one or all Inputs are false the Output will be true"
3 Inputs NAND gate Truth table :
Resistor-Transistor Logic NAND gate :
The Resistor-transistor Logic gates are construct NAND logic. Fig-2 shows a RTL- Resistor Transistor Logic for NOR gate. Two Transistors and three Resistors can develop NAND gate logic. The Bases of the two transistors are used as the inputs through the resistors and the collector connected to the resistor R3 gives the NAND logic output.TTL based NAND gate ICs are shown below :
- 74LS00 Quad 2-input
- 74LS10 Triple 3-input
- 74LS20 Dual 4-input
- 74LS30 Mono 8-input
CMOS NAND gate :
Two(2) p-type and two(2) n-type MOSFETs constructs a 2 input NAND gate logic. The pair of p-type and n-type FET's gates are jointly make inputs and output comes from where the two p-type FET's Sources and a n-type FET's Drain are connected. See the Fig-3. The CMOS type NOR gates are shown below :
- CD4011 Quad 2-input
- CD4023 Triple 3-input
- CD4012 Dual 4-input
- CD4068 Mono 4-input